High-speed PCB via design tips


High-speed PCB via design tips
    In high-speed PCB board design, via design is an important factor. It consists of a hole, a pad area around the hole, and a POWER layer isolation area. It is usually divided into blind holes, buried holes and through holes. Through the analysis of the parasitic capacitance and parasitic inductance of the vias during the PCB design process, some considerations in the design of the high-speed PCB vias are summarized.
    At present, the design of high-speed PCB board is widely used in communication, computer, graphic image processing and other fields. All high-tech value-added electronic products are designed with low power consumption, low electromagnetic radiation, high reliability, miniaturization and light weight. In order to achieve the above goals, via design is an important factor in high-speed PCB board design.
    1, through hole
    Via is an important factor in the design of multi-layer PCB. One via is mainly composed of three parts, one is the hole; the other is the pad area around the hole; the third is the POWER layer isolation area. The via process is a method of chemically depositing a layer of metal on the cylindrical surface of the via hole of the via hole to connect the copper foil to be connected in the middle layer, and the upper and lower sides of the via hole are made into ordinary pads. The shape can be directly connected to the lines on the upper and lower sides, or not. The vias can function as electrical connections, fixed or xxx pieces.
    Vias are generally divided into three categories: blind vias, buried vias, and vias.
    A blind hole, which is located on the top and bottom surfaces of a printed wiring board, has a certain depth for the connection of the surface line and the underlying inner layer. The depth and aperture of the hole usually do not exceed a certain ratio.
    Buried hole refers to the connection hole located in the inner layer of the printed circuit board, which does not extend to the surface of the circuit board.
    Both the blind hole and the buried hole are located in the inner layer of the circuit board, and are completed by the through hole forming process before lamination, and several inner layers may be overlapped during the formation of the via hole. Through-holes that pass through the entire board and can be used to implement internal interconnections or as mounting holes for components. Since the through holes are easier to implement in the process and the cost is lower, the through holes are generally used for the printed circuit boards.
    2, the parasitic capacitance of the via
    The via hole itself has a parasitic capacitance to the ground. If the via hole diameter of the via hole on the ground layer is D2, the diameter of the via hole pad is D1, the thickness of the PCB is T, and the dielectric constant of the board substrate is E, then The parasitic capacitance of the via is approximately the same as:
The main effect of the parasitic capacitance of the via on the circuit is to extend the rise time of the signal and reduce the speed of the circuit. The smaller the capacitance, the smaller the effect.
    3, the parasitic inductance of the via
    The vias themselves have parasitic inductance. In the design of high-speed digital circuits, the parasitic inductance of vias often causes more damage than parasitic capacitance. The parasitic series inductance of the vias weakens the bypass capacitor and reduces the filtering effectiveness of the entire power system. If L is the inductance of the via, h is the length of the via, and d is the diameter of the center hole. The parasitic inductance of the via is similar to:
    L=5.08h[ln(4h/d) 1]
    It can be seen from the equation that the diameter of the via has less influence on the inductance, and the influence on the inductance is the length of the via.
    4, non-through hole technology
    The non-through guide holes include blind holes and buried holes. In the non-through hole technology, the application of blind holes and buried holes can greatly reduce the size and quality of the PCB, reduce the number of layers, improve electromagnetic compatibility, increase the characteristics of electronic products, reduce costs, and also make the design work more Simple and fast.
    Through-holes pose many problems in traditional PCB design and processing. First, they occupy a large amount of effective space. Secondly, a large number of through-holes are also a huge obstacle to the inner layer of the multilayer PCB. These through-holes occupy the space required for the traces, and they pass through the power and ground intensively. The surface of the wire layer also destroys the impedance characteristics of the power ground layer and disables the power ground layer. And conventional mechanical drilling will be 20 times the amount of work with non-through hole technology.
    In the PCB design, although the size of the pads and vias has been gradually reduced, if the thickness of the layer is not scaled down, the aspect ratio of the vias will increase, and the increase of the aspect ratio of the vias will reduce the reliability. With the advancement of advanced laser drilling technology and plasma dry etching technology, it is possible to use small through holes and small buried holes. If the diameter of these non-through holes is 0.3mm, the parasitic parameters are The original conventional hole is about 1/10, which improves the reliability of the PCB. Due to the non-through-via technology, there are few large vias on the PCB, which provides more space for the traces.
    The remaining space can be used for large area shielding to improve EMI / RFI performance. At the same time, more free space can be used for the inner layer to partially shield the device and the critical network cable to make it electrically. The use of non-via vias makes it easier to fan out the device pins, making high-density pin devices (such as BGA package devices) easy to route, shortening the length of the wires, and meeting high-speed circuit timing requirements.
    5, the choice of vias in ordinary PCB

    In common PCB design, the parasitic capacitance and parasitic inductance of vias have less impact on PCB design. For 1-4 layer PCB design, 0.36mm/0.61mm/1.02mm is generally used (drilling/pad/POWER isolation). The vias of the area) are better. Some special requirements signal lines (such as power lines, ground lines, clock lines, etc.) can be used with 0.41mm/0.81mm/1.32mm vias, or the remaining sizes of vias can be selected according to the actual situation. 



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